EDN

90-nm FPGAs embed SerDes, physical coding sublayer block

Hillsboro, Ore.—Lattice Semiconductor Corp. has released the LatticeECP2M FPGA family, consisting of low cost devices that offer high-speed embedded SerDes I/O plus a pre-engineered Physical Coding ...
Design-Reuse

Evatronix enhances its Ethernet MAC product line with MAC-1G PCS IP core

Physical Coding Sublayer (PCS) add-on to the successful MAC-1G controller provides new opportunities for an already wide range of possible implementations. Gliwice & Bielsko-Biala, Poland, June ...
Electronic Design

Communication Cores Added To FPGAs For LANs And WANs

Two core products, the 10 Gigabit Physical Coding Sublayer (PCS) and the Media Access Controller (MAC), are intended for use in Xilinx’s Virtex-II and Virtex-II Pro field programmable gate arrays ...
EDN

40- and 100-Gbps Ethernet brings new test challenges

Internet and data-center users always demand higher bandwidth to carry voice, data, and especially video. Because of that demand, today's 10-Gbps optical and electrical links are running out of ...